This is incomplete and just a collection point for information as it is collected.
-1
and -1U
This indicates the antenna type
-1
has an PCB antenna
-1U
has an external antenna connector
Nx, Rx, Hx
Nx
is the SPI Flash size
Rx
is the PSRAM size
Hx
is an extended temp FLASH version
- ESP32-S3-WROOM-1-N8 PCB antenna with 8M Flash
- ESP32-S3-WROOM-1U-N8R8 External antenns connector, 8M FLASH, 8M PSRAM
- gpio.0 (See strapping pins)
- gpio.1
- gpio.2
- gpio.3 (See strapping pins)
- gpio.4 Weak pull up on reset
- gpio.5
- gpio.6
- gpio.7
- gpio.8
- gpio.9
- gpio.10
- gpio.11
- gpio.12
- gpio.13
- gpio.14
- gpio.15
- gpio.16
- gpio.17
- gpio.18
- gpio.19 Used for native USB D-
- gpio.20 Used for native USB D+
- gpio.21
- gpio.35 Used for PSRAM, weak pull up on reset
- gpio.36 Used for PSRAM
- gpio.37 Used for PSRAM
- gpio.38
- gpio.39
- gpio.40
- gpio.41
- gpio.42
- gpio.45 (See strapping pins)
- gpio.46 (See strapping pins)
- gpio.47
- gpio.48
- gpio.19 Used for native USB D-
- gpio.20 Used for native USB D+
- gpio.43 Used for USB/Serial U0TXD
- gpio.44 Used for USB Serial U0RXD
If you have PSRAM, you also cannot use gpio.35 - gpio.37 .
Typically these can be used, but you need to make sure they are not in the wrong state during boot.
- gpio.0 Boot Mode. Weak pullup during reset. (Boot Mode 0=Boot from Flash, 1=Download)
- gpio.3 JTAG Mode. Weak pull down during reset. (JTAG Config)
- gpio.45 SPI Flash voltage. Weak pull down during reset. (SPI Voltage 0=3.3v 1=1.8v)
- gpio.46 Boot mode. Weak pull down during reset. (Enabling/Disabling ROM Messages Print During Booting)
While not recommended, it is possible to burn the SPI voltage in a EFuse, effectively ignoring gpio.45. See Espressif EFuse docs for more information; look for VDD_SPI .
These pins are the default pins, however they can be remapped to any other gpio.
Default pins in the Arduino framework are:
I2C can be mapped to any available gpio pin without a penalty.
There is an aditional I2C interface which does not seem to have default pins.
The ESP32 S3 has four SPI interfaces which are:
- SPI0 used by ESP32-S3’s cache and Crypto DMA (EDMA) to access in-package or off-package flash/PSRAM
- SPI1 used by the CPU to access in-package or off-package flash/PSRAM
- SPI2 is a general purpose SPI controller with its own DMA channel
- SPI3 is a general purpose SPI controller with access to a DMA channel shared between several peripherals
The SPI2 (VSPI) default pins are:
- gpio.12 SCK Defined as SPI0_SCK
- gpio.11 MOSI Defined as SPI0_MOSI
- gpio.13 MISO Defined as SPI0_MISO
- gpio.10 CSO Defined as SPI_CS0
These default pins run through the IOMUX instead of the GPIO matrix, and therefore have higher
performance characteristics. The maximum frequency for IOMUX pins is 80 MHz.
SPI3 does not have default pin mappings because it can be mapped to any available gpio pins.
The ESP32 S3 has two I2S interfaces which can be mapped to any available gpio pins.